Contact us | Sitemap | English
       
 
Design Flow
HPDF
Low Power Design
Signal Integrity
 
About u
What is Hierarchical Physical Design Flow ( HPDF ) ?
Partition Physical block and the timing constraints from chip to block level.
Used for both a fast exploration for the design and to implement a final, optimized and detailed hierarchical floorplan.

 
Hierarchical Physical Design Flow
 
주식회사 아르고  TEL : 031)713-0607  FAX : 031)713-0207  e-mail : support@argosys.co.kr
Copyright ⓒ ARGO Co.,LTD. All rights reserved.